60 #include "rnr/rnrconfig.h" 61 #include "rnr/units.h" 80 #define DYNA_ECODE_GEN 1 81 #define DYNA_ECODE_SYS 2
82 #define DYNA_ECODE_INTERNAL 3
83 #define DYNA_ECODE_BADEC 4
84 #define DYNA_ECODE_BAD_UNITS 5
85 #define DYNA_ECODE_BAD_VAL 6
86 #define DYNA_ECODE_NO_SERVO 7
87 #define DYNA_ECODE_BAD_DEV 8
88 #define DYNA_ECODE_BADF 9
89 #define DYNA_ECODE_ECOMM 10
90 #define DYNA_ECODE_TX_FAIL 11
91 #define DYNA_ECODE_RX_FAIL 12
92 #define DYNA_ECODE_TX_ERROR 13
93 #define DYNA_ECODE_RX_TIMEOUT 14
94 #define DYNA_ECODE_RX_BAD_PKT 15
95 #define DYNA_ECODE_ESERVO 16
96 #define DYNA_ECODE_RSRC 17
97 #define DYNA_ECODE_NOT_SUPP 18
98 #define DYNA_ECODE_LINKED 19
99 #define DYNA_ECODE_SLAVE 20
100 #define DYNA_ECODE_BOTSENSE 21
101 #define DYNA_ECODE_PARSE 22
102 #define DYNA_ECODE_RUNTIME 23
103 #define DYNA_ECODE_NOEXEC 24
105 #define DYNA_ECODE_NUMOF 25 119 #define DYNA_MODEL_NUM_GENERIC 0x0000 136 #define DYNA_FWVER_NA 0x00 145 #define DYNA_ID_NONE -1 146 #define DYNA_ID_MIN 0
147 #define DYNA_ID_MAX 253
148 #define DYNA_ID_NUMOF 254
149 #define DYNA_ID_BROADCAST 254
150 #define DYNA_ID_RESERVED 255
151 #define DYNA_ID_MASK 0xff
170 #define DYNA_MODE_SERVO 0x01 171 #define DYNA_MODE_CONTINUOUS 0x02
180 #define DYNA_LINK_NONE 0 181 #define DYNA_LINK_MASTER 1
182 #define DYNA_LINK_SLAVE 2
191 #define DYNA_DIR_CW (-1) 192 #define DYNA_DIR_NONE 0
193 #define DYNA_DIR_CCW 1
200 #define DYNA_GET_DIR(scalar) ((scalar)<0? DYNA_DIR_CW: DYNA_DIR_CCW) 215 #define DYNA_CTL_METHOD_NONE 0 216 #define DYNA_CTL_METHOD_COMPLIANCE 1
217 #define DYNA_CTL_METHOD_PID 2
243 #define DYNA_POS_MASK 0x03ff 244 #define DYNA_POS_MIN_RAW 0
245 #define DYNA_POS_MAX_RAW 1023
246 #define DYNA_POS_MODULO (DYNA_POS_MAX_RAW+1)
248 #define DYNA_POS_MIN_DEG 0 249 #define DYNA_POS_MAX_DEG 300
250 #define DYNA_POS_RES_DEG ((double)DYNA_POS_MAX_DEG/(double)DYNA_POS_MAX_RAW)
260 #define DYNA_SPEED_MASK 0x03ff 261 #define DYNA_SPEED_CONT_STOP 0
262 #define DYNA_SPEED_MAX_NO_CTL 0
263 #define DYNA_SPEED_MIN_CTL 1
264 #define DYNA_SPEED_MAX_CTL 1023
265 #define DYNA_SPEED_MIN_RAW 0
266 #define DYNA_SPEED_MAX_RAW 1023
267 #define DYNA_SPEED_RES_RPM 0.111
268 #define DYNA_SPEED_RES_PCT (100.0/DYNA_SPEED_MAX_RAW)
270 #define DYNA_SPEED_RES_PMIL (1000.0/DYNA_SPEED_MAX_RAW) 280 #define DYNA_TORQUE_MASK 0x03ff 281 #define DYNA_TORQUE_MIN_RAW 0
282 #define DYNA_TORQUE_MAX_RAW 1023
283 #define DYNA_TORQUE_RES_PCT (100.0/DYNA_TORQUE_MAX_RAW)
285 #define DYNA_TORQUE_RES_PMIL (1000.0/DYNA_TORQUE_MAX_RAW) 295 #define DYNA_TEMP_MIN_RAW 10 296 #define DYNA_TEMP_MAX_RAW 99
297 #define DYNA_TEMP_MIN_C DYNA_TEMP_MIN_RAW
298 #define DYNA_TEMP_MAX_C DYNA_TEMP_MAX_RAW
299 #define DYNA_TEMP_RES_C 1
308 #define DYNA_VOLT_MIN_RAW 50 309 #define DYNA_VOLT_MAX_RAW 250
310 #define DYNA_VOLT_RES_V 0.1
333 #define DYNA_EEPROM_MIN_ADDR 0 334 #define DYNA_EEPROM_MAX_ADDR 18
335 #define DYNA_RAM_MIN_ADDR 24
336 #define DYNA_RAM_MAX_ADDR 49
337 #define DYNA_MEM_MAX_SIZ 50
353 #define DYNA_ADDR_MODEL_NUM_LSB 0 354 #define DYNA_ADDR_MODEL_NUM_MSB 1
356 #define DYNA_ADDR_MODEL_NUM_MASK 0xffff 367 #define DYNA_ADDR_FWVER 2 369 #define DYNA_ADDR_FWVER_MASK 0xff 380 #define DYNA_ADDR_ID 3 382 #define DYNA_ADDR_ID_MASK 0xff 396 #define DYNA_ADDR_BAUD_RATE 4 398 #define DYNA_ADDR_BAUD_RATE_MASK 0xff 401 #define DYNA_BAUDNUM_1000000 1 402 #define DYNA_BAUDNUM_500000 3
403 #define DYNA_BAUDNUM_400000 4
404 #define DYNA_BAUDNUM_250000 7
405 #define DYNA_BAUDNUM_200000 9
406 #define DYNA_BAUDNUM_115200 16
407 #define DYNA_BAUDNUM_57600 34
408 #define DYNA_BAUDNUM_19200 103
409 #define DYNA_BAUDNUM_9600 207
412 #define DYNA_BAUDNUM_EXT_2250000 250 413 #define DYNA_BAUDNUM_EXT_2500000 251
414 #define DYNA_BAUDNUM_EXT_3000000 252
416 #define DYNA_BAUDNUM_NUMOF 12 418 #define DYNA_BAUDNUM_DFT 34 419 #define DYNA_BAUDRATE_DFT 57600
434 #define DYNA_ADDR_T_RET_DELAY 5 436 #define DYNA_ADDR_T_RET_DELAY_MASK 0xff 438 #define DYNA_T_RET_DELAY_MIN_RAW 0x00 439 #define DYNA_T_RET_DELAY_MAX_RAW 0xff
440 #define DYNA_T_RET_DELAY_DFT_RAW 0x00
441 #define DYNA_T_RET_DELAY_RES_USEC 2
442 #define DYNA_T_RET_DELAY_MIN_USEC \
443 (DYNA_T_RET_DELAY_MIN_RAW * DYNA_T_RET_DELAY_RES_USEC)
445 #define DYNA_T_RET_DELAY_MAX_USEC \ 446 (DYNA_T_RET_DELAY_MAX_RAW * DYNA_T_RET_DELAY_RES_USEC) 448 #define DYNA_T_RET_DELAY_DFT_USEC \ 449 (DYNA_T_RET_DELAY_DFT_RAW * DYNA_T_RET_DELAY_RES_USEC) 464 #define DYNA_ADDR_LIM_CW_LSB 6 465 #define DYNA_ADDR_LIM_CW_MSB 7
467 #define DYNA_ADDR_LIM_CW_MASK 0x03ff 469 #define DYNA_CW_POS_CONT_MODE 0 483 #define DYNA_ADDR_LIM_CCW_LSB 8 484 #define DYNA_ADDR_LIM_CCW_MSB 9
486 #define DYNA_ADDR_LIM_CCW_MASK 0x03ff 488 #define DYNA_CCW_POS_CONT_MODE 0 491 #define DYNA_ADDR_RESERVED_1 10 503 #define DYNA_ADDR_LIM_TEMP_MAX 11 505 #define DYNA_ADDR_LIM_TEMP_MASK 0x3f 507 #define DYNA_LIM_TEMP_MIN_C DYNA_TEMP_MIN_C 508 #define DYNA_LIM_TEMP_MAX_C DYNA_TEMP_MAX_C
509 #define DYNA_LIM_TEMP_DFT_C 80
510 #define DYNA_LIM_TEMP_RES_C DYNA_TEMP_RES_C
524 #define DYNA_ADDR_LIM_VOLT_MIN 12 526 #define DYNA_ADDR_LIM_VOLT_MIN_MASK 0xff 528 #define DYNA_LIM_VOLT_MIN_MIN_RAW DYNA_VOLT_MIN_RAW 530 #define DYNA_LIM_VOLT_MIN_MAX_RAW DYNA_VOLT_MAX_RAW 532 #define DYNA_LIM_VOLT_MIN_DFT_RAW 60 533 #define DYNA_LIM_VOLT_MIN_RES_V DYNA_VOLT_RES_V
534 #define DYNA_LIM_VOLT_MIN_MIN_V \
535 (DYNA_LIM_VOLT_MIN_MIN_RAW * DYNA_LIM_VOLT_MIN_RES_V)
537 #define DYNA_LIM_VOLT_MIN_MAX_V \ 538 (DYNA_LIM_VOLT_MIN_MAX_V * DYNA_LIM_VOLT_MIN_RES_V) 540 #define DYNA_LIM_VOLT_MIN_DFT_V \ 541 (DYNA_LIM_VOLT_MIN_DFT_V * DYNA_LIM_VOLT_MIN_RES_V) 555 #define DYNA_ADDR_LIM_VOLT_MAX 13 557 #define DYNA_ADDR_LIM_VOLT_MAX_MASK 0xff 559 #define DYNA_LIM_VOLT_MAX_MIN_RAW DYNA_VOLT_MIN_RAW 561 #define DYNA_LIM_VOLT_MAX_MAX_RAW DYNA_VOLT_MAX_RAW 563 #define DYNA_LIM_VOLT_MAX_DFT_RAW 190 564 #define DYNA_LIM_VOLT_MAX_RES_V DYNA_VOLT_RES_V
565 #define DYNA_LIM_VOLT_MAX_MIN_V \
566 (DYNA_LIM_VOLT_MAX_MIN_RAW * DYNA_LIM_VOLT_MAX_RES_V)
568 #define DYNA_LIM_VOLT_MAX_MAX_V \ 569 (DYNA_LIM_VOLT_MAX_MAX_V * DYNA_LIM_VOLT_MAX_RES_V) 571 #define DYNA_LIM_VOLT_MAX_DFT_V \ 572 (DYNA_LIM_VOLT_MAX_DFT_V * DYNA_LIM_VOLT_MAX_RES_V) 589 #define DYNA_ADDR_LIM_TORQUE_MAX_ON_LSB 14 590 #define DYNA_ADDR_LIM_TORQUE_MAX_ON_MSB 15
592 #define DYNA_ADDR_LIM_TORQUE_MAX_ON_MASK 0x03ff 594 #define DYNA_LIM_TORQUE_MAX_ON_DFT_RAW DYNA_TORQUE_MAX_RAW 606 #define DYNA_ADDR_SRL 16 608 #define DYNA_ADDR_SRL_MASK 0xff 610 #define DYNA_SRL_RET_NONE 0 611 #define DYNA_SRL_RET_READ 1
612 #define DYNA_SRL_RET_ALL 2
613 #define DYNA_SRL_RET_DFT DYNA_SRL_RET_ALL
627 #define DYNA_ADDR_ALARM_LED 17 629 #define DYNA_ADDR_ALARM_LED_MASK 0xff 631 #define DYNA_ALARM_LED_DFT DYNA_ALARM_DFT 642 #define DYNA_ADDR_ALARM_SHUTDOWN 18 644 #define DYNA_ADDR_ALARM_SHUTDOWN_MASK 0xff 646 #define DYNA_ALARM_NONE 0x00 647 #define DYNA_ALARM_VOLTAGE 0x01
648 #define DYNA_ALARM_ANGLE 0x02
649 #define DYNA_ALARM_TEMP 0x04
650 #define DYNA_ALARM_CMD_RANGE 0x08
651 #define DYNA_ALARM_CHECKSUM 0x10
652 #define DYNA_ALARM_LOAD 0x20
653 #define DYNA_ALARM_INSTRUCTION 0x40
655 #define DYNA_ALARM_DFT (DYNA_ALARM_LOAD | DYNA_ALARM_TEMP) 672 #define DYNA_ADDR_TORQUE_EN 24 674 #define DYNA_ADDR_TORQUE_EN_MASK 0xff 676 #define DYNA_TORQUE_EN_OFF 0 677 #define DYNA_TORQUE_EN_ON 1
678 #define DYNA_TORQUE_EN_DFT DYNA_TORQUE_EN_OFF // default torque enable
689 #define DYNA_ADDR_LED 25 691 #define DYNA_ADDR_LED_MASK 0xff 693 #define DYNA_LED_OFF 0 694 #define DYNA_LED_ON 1
733 #define DYNA_ADDR_CW_COMP_MARGIN 26 735 #define DYNA_ADDR_CW_COMP_MASK 0xff 737 #define DYNA_COMP_MARGIN_MIN_RAW 0 738 #define DYNA_COMP_MARGIN_MAX_RAW 255
739 #define DYNA_COMP_MARGIN_DFT_RAW 1
740 #define DYNA_COMP_MARGIN_RES_DEG DYNA_POS_RES_DEG
742 #define DYNA_COMP_MARGIN_MIN_DEG \ 743 (DYNA_COMP_MARGIN_MIN_RAW * DYNA_COMP_MARGIN_RES_DEG) 745 #define DYNA_COMP_MARGIN_MAX_DEG \ 746 (DYNA_COMP_MARGIN_MAX_RAW * DYNA_COMP_MARGIN_RES_DEG) 748 #define DYNA_COMP_MARGIN_DFT_DEG \ 749 (DYNA_COMP_MARGIN_DFT_RAW * DYNA_COMP_MARGIN_RES_DEG) 766 #define DYNA_ADDR_CCW_COMP_MARGIN 27 768 #define DYNA_ADDR_CCW_COMP_MASK 0xff 781 #define DYNA_ADDR_CW_COMP_SLOPE 28 783 #define DYNA_ADDR_CW_COMP_SLOPE_MASK 0xff 785 #define DYNA_COMP_SLOPE_TORQUE_1 0x02 786 #define DYNA_COMP_SLOPE_TORQUE_2 0x04
787 #define DYNA_COMP_SLOPE_TORQUE_3 0x08
788 #define DYNA_COMP_SLOPE_TORQUE_4 0x10
789 #define DYNA_COMP_SLOPE_TORQUE_5 0x20
790 #define DYNA_COMP_SLOPE_TORQUE_6 0x40
791 #define DYNA_COMP_SLOPE_TORQUE_7 0x80
793 #define DYNA_COMP_SLOPE_TORQUE_DFT DYNA_COMP_SLOPE_TORQUE_5 810 #define DYNA_ADDR_CCW_COMP_SLOPE 29 812 #define DYNA_ADDR_CCW_COMP_SLOPE_MASK 0xff 835 #define DYNA_ADDR_P_GAIN 26 837 #define DYNA_ADDR_P_GAIN_MASK 0xff 839 #define DYNA_P_GAIN_MIN_RAW 0 840 #define DYNA_P_GAIN_MAX_RAW 254
841 #define DYNA_P_GAIN_DFT 32
857 #define DYNA_ADDR_I_GAIN 27 859 #define DYNA_ADDR_I_GAIN_MASK 0xff 861 #define DYNA_I_GAIN_MIN_RAW 0 862 #define DYNA_I_GAIN_MAX_RAW 254
863 #define DYNA_I_GAIN_DFT 0
879 #define DYNA_ADDR_D_GAIN 28 881 #define DYNA_ADDR_D_GAIN_MASK 0xff 883 #define DYNA_D_GAIN_MIN_RAW 0 884 #define DYNA_D_GAIN_MAX_RAW 254
885 #define DYNA_D_GAIN_DFT 0
893 #define DYNA_ADDR_PID_RESERVED 29 909 #define DYNA_ADDR_GOAL_POS_LSB 30 910 #define DYNA_ADDR_GOAL_POS_MSB 31
912 #define DYNA_ADDR_GOAL_POS_MASK 0x03ff 940 #define DYNA_ADDR_GOAL_SPEED_LSB 32 941 #define DYNA_ADDR_GOAL_SPEED_MSB 33
943 #define DYNA_ADDR_GOAL_SPEED_MASK 0x07ff 945 #define DYNA_GOAL_SPEED_MAG_MASK 0x03ff 946 #define DYNA_GOAL_SPEED_MAG_SHIFT 0
948 #define DYNA_GOAL_SPEED_DIR_MASK 0x0400 949 #define DYNA_GOAL_SPEED_DIR_SHIFT 10
950 #define DYNA_GOAL_SPEED_DIR_CCW 0x00
951 #define DYNA_GOAL_SPEED_DIR_CW (0x01 << DYNA_CUR_SPEED_DIR_SHIFT)
965 #define DYNA_ADDR_LIM_TORQUE_MAX_LSB 34 966 #define DYNA_ADDR_LIM_TORQUE_MAX_MSB 35
968 #define DYNA_ADDR_LIM_TORQUE_MAX_MASK 0x03ff 970 #define DYNA_LIM_TORQUE_MAX_ALARMED 0 985 #define DYNA_ADDR_CUR_POS_LSB 36 986 #define DYNA_ADDR_CUR_POS_MSB 37
988 #define DYNA_ADDR_CUR_POS_MASK 0x03ff 1009 #define DYNA_ADDR_CUR_SPEED_LSB 38 1010 #define DYNA_ADDR_CUR_SPEED_MSB 39
1012 #define DYNA_ADDR_CUR_SPEED_MASK 0x07ff 1014 #define DYNA_CUR_SPEED_MAG_MASK 0x03ff 1015 #define DYNA_CUR_SPEED_MAG_SHIFT 0
1017 #define DYNA_CUR_SPEED_DIR_MASK 0x0400 1018 #define DYNA_CUR_SPEED_DIR_SHIFT 10
1019 #define DYNA_CUR_SPEED_DIR_CCW 0x00
1020 #define DYNA_CUR_SPEED_DIR_CW (0x01 << DYNA_CUR_SPEED_DIR_SHIFT)
1032 #define DYNA_ADDR_CUR_LOAD_LSB 40 1033 #define DYNA_ADDR_CUR_LOAD_MSB 41
1035 #define DYNA_ADDR_CUR_LOAD_MASK 0x07ff 1037 #define DYNA_CUR_LOAD_MAG_MASK 0x03ff 1038 #define DYNA_CUR_LOAD_MAG_SHIFT 0
1039 #define DYNA_CUR_LOAD_MAG_MIN 0
1040 #define DYNA_CUR_LOAD_MAG_MAX 1023
1042 #define DYNA_CUR_LOAD_DIR_MASK 0x0400 1043 #define DYNA_CUR_LOAD_DIR_SHIFT 10
1044 #define DYNA_CUR_LOAD_DIR_CCW 0x00
1045 #define DYNA_CUR_LOAD_DIR_CW (0x01 << DYNA_CUR_LOAD_DIR_SHIFT)
1047 #define DYNA_CUR_LOAD_RES_PCT (100.0/DYNA_CUR_LOAD_MAG_MAX) 1049 #define DYNA_CUR_LOAD_RES_PMIL (1000.0/DYNA_CUR_LOAD_MAG_MAX) 1061 #define DYNA_ADDR_CUR_VOLT 42 1063 #define DYNA_ADDR_CUR_VOLT_MASK 0xff 1065 #define DYNA_CUR_VOLT_RES_V DYNA_VOLT_RES_V 1076 #define DYNA_ADDR_CUR_TEMP_C 43 1078 #define DYNA_ADDR_CUR_TEMP_MASK 0xff 1080 #define DYNA_CUR_TEMP_RES_C DYNA_TEMP_RES_C 1092 #define DYNA_ADDR_REG_INSTR 44 1094 #define DYNA_ADDR_REG_INSTR_MASK 0xff 1096 #define DYBA_REG_INSTR_NO_WRITE 0 1097 #define DYBA_REG_INSTR_HAS_WRITE 1
1100 #define DYNA_ADDR_RESERVED_2 45 1110 #define DYNA_ADDR_IS_MOVING 46 1112 #define DYNA_ADDR_IS_MOVING_MASK 0xff 1114 #define DYNA_IS_NOT_MOVING 0 1115 #define DYNA_IS_MOVING 1
1128 #define DYNA_ADDR_EEPROM_LOCK 47 1130 #define DYNA_ADDR_EEPROM_LOCK_MASK 0xff 1132 #define DYNA_EEPROM_UNLOCKED 0 1133 #define DYNA_EEPROM_LOCKED 1
1134 #define DYNA_EEPROM_LOCK_DFT 0
1147 #define DYNA_ADDR_PUNCH_LSB 48 1148 #define DYNA_ADDR_PUNCH_MSB 49
1157 #endif // _DYNAMIXEL_H